- Base Camera Link Configuration.
- Single lane (x1) v1.1 PCI Express interface.
- PCI Express burst rates in excess of 190Mbytes/sec.
- Supports Power over Camera Link with SafePower.
- Multi-tap & multi-channel camera formats, incl. line and pixel interleaved.
- Maximum pixel clock of 85MHz.
- PHX SDK supports various operating systems.
- v1.2 Camera Link compliant.
- Hardware control of scatter-gather requiring 0% CPU.
- Serial port with EIA-644 signalling, also accessible as a standard Windows COM port.
- Supports Camera Link serial comms API.
- Implements Data Valid (DVAL) for slow data rate cameras.
- Opto-Isolated, TTL and EIA-644 I/O.
- Utilises software configurable FPGA technology.
- Common API allows seamless migration for existing Phoenix PCI users.
- RoHS compliant.
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